US Patent 7838943 - Shared gate for hybrid nanoelectronics

http://www.freepatentsonline.com/7838943.html

CMOS device electronics requires the manufacture of both n-doped and p-doped transistors. However, it can be difficult to achieve both doping types using only carbon nanotubes and hybrid techniques using both conventional MOSFETs with nanotube MOSFETs may be preferable. This patent from IBM teaches such a configuration. Claim 1 reads:

1. A hybrid semiconductor structure comprising:

a semiconductor device comprising a semiconductor substrate having a source region and a drain region separated by a channel region, a first gate dielectric that is present on the channel region and a gate conductor that is present on the first gate dielectric; and

a carbon nanotube transistor comprising a second gate dielectric that is in direct contact with an upper surface of the gate conductor, and a carbon nanotube in direct contact with a portion of the second gate dielectric that is in direct contact with the upper surface of the gate conductor,

wherein said gate conductor is shared for both the semiconductor device and the carbon nanotube transistor.